The present invention relates to a dicing method using a chemical etching treatment to divide a semiconductor wafer into individual semiconductor chips.
Referring to FIG. 12, a semiconductor wafer W is combined with a frame F as a whole unit, with an adhesive tape T applied therebetween. The semiconductor wafer W has crosswise streets S formed on its front surface. These streets are arranged at regular intervals in the form of lattice to define a lot of rectangular regions each having a circuit pattern formed therein. A rotary blade is used to cut the semiconductor wafer W along the crosswise streets S into individual semiconductor chips.
Semiconductor chips, however, are often cracked or inner-stressed on their edges while being diced by the rotary blades. Such defects are apt to reduce their flexural strength so that they may be susceptible to undesired outer force or thermal cyclic influence to be damaged or shortened in life. This is increasingly conspicuous with semiconductor wafers having a thickness of 50 xcexcm or less, and such cracks or inner stresses are almost fatal to thin wafers.
In the hope of dealing with this problem, the semiconductor wafer dicing method using chemical etching has been studied and proposed. It comprises the steps of: applying a photo-sensitive tape member to the surface of a semiconductor wafer W having a plurality of circuit patterns formed thereon; light-exposing the portions of the tape member lying on the crosswise streets of the semiconductor wafer with a photomask applied on the tape member; removing the exposed crosswise portions of the tape member changed in properties by the light exposure; and eroding the exposed crosswise streets of the semiconductor wafer to divide it into individual semiconductor chips.
However, in order to light-expose only the portions of the tape member lying on the crosswise streets in the method stated above, it is required to prepare a plurality of photomasks which are different in size to exactly conform to different semiconductor wafers to be diced, and which have lattice patterns being different in size of the streets. This is disadvantageous from the economical point of view. Also, a complicated problem is caused in management.
Still disadvantageously, it is necessary to install an exposure apparatus which can precisely align a semiconductor wafer with the overlying photomask in respect of their lattice patterns. In addition, it is necessary to install a coating removal apparatus for selectively removing the portion of the photoresist coating which was exposed to light and changed in properties in the form of lattice pattern. Such extra apparatuses cost much in capital investment.
In case patterns such as an alignment mark are formed on the streets of a semiconductor wafer W with a material which cannot be removed by a chemical etching treatment, the semiconductor wafer W actually cannot be diced by the etching treatment.
Incidentally, it has been proposed a method comprising covering the whole surface of the semiconductor wafer having a plurality of circuit patterns formed thereon with a photoresist coating, mechanically removing the lattice portions of the photoresist coating being exactly in alignment with the underlying crosswise streets of semiconductor wafer with use of a rotary blade, and thereafter chemically etching the semiconductor wafer along the exposed crosswise streets to dice the wafer into individual semiconductor chips, as disclosed e.g. in JP 2001-127011A.
However, in the method stated above, it is difficult to coat the semiconductor wafer with a photoresist coating having a constant thickness. Also, it is practically impossible to coat the semiconductor wafer thick enough to remain on the diced semiconductor wafer even after completing erosion of the semiconductor wafer. As a matter of fact, the coating is eroded and removed from the semiconductor wafer before the semiconductor wafer is completely diced.
Accordingly, in case semiconductor wafers are chemically etched and diced into individual semiconductor chips, there has been a demand that the dicing process should be carried out to surely provide individual semiconductor chips of high quality without cracks and inner stresses, without extra cost required.
To meet such demand, a method for dicing a semiconductor wafer having regions sectioned by crosswise streets into individual semiconductor chips, each of the regions having a circuit pattern formed therein, comprises at least the following steps according to the present invention, that is, a masking step of covering the semiconductor wafer with a tape member to cover the circuit face of the semiconductor wafer on which the circuit patterns are formed; a selective tape-removing step of mechanically cutting and removing selectively crosswise portions of the tape member which are exactly aligned with the underlying crosswise streets of the semiconductor wafer; and an etching and dividing step of chemically etching the semiconductor wafer having the crosswise streets uncovered, whereby the crosswise streets are permitted to erode so that the semiconductor wafer is divided into individual semiconductor chips.
The thickness of the tape member may be determined in consideration of the depth of the semiconductor wafer to be eroded and divided into individual semiconductor chips. In case that a cover layer which cannot be removed by the chemical etching is formed on the crosswise streets, the cover layer on the crosswise street pattern can be removed by cutting in the selective tape-removing step. The chemical etching may be dry-etching.
As described above, the tape member is applied to the circuit face of the semiconductor wafer, and it is subjected to the selective tape-removing step, whereby the portions of the tape lying along the crosswise streets are cut and removed. The semiconductor wafer thus party uncovered is chemical-etched in the exposed crosswise streets to be divided into individual semiconductor chips. The semiconductor chips thus provided are free of cracks or any other defects, and high in flexural strength. Advantageously, the etching process needs neither photomasks nor exposure equipment. In case semiconductor wafers have a thickness of 50 xcexcm or less, they are most likely to cause cracks or inner-stress when being mechanically cut into semiconductor chips. Even such thin semiconductor wafers can be hardly cracked or inner-stressed when being chemically etched to divide into individual semiconductor chips.
Usually in semiconductor factories, mechanical dicing apparatuses are installed, and therefore, such existing equipment can be used in carrying out the dicing method according to the present invention. No extra investment, therefore, is required for the purpose.
Still advantageously, it does not take a long time to dice 50 or less micron-thick wafers by chemical etching although the time involved for erosion significantly increases for thicker wafers.
In case that semiconductor wafers have crosswise streets covered with a material which cannot be removed by dry etching such as alignment marks, which cannot be removed by etching treatment, they can be removed by driving the rotary blade a few microns deep into the thickness of the semiconductor wafer, thereby making the silicon substrate exposed.